Bosch PPP6 B8 Series Servisní příručka stáhnout pdf (Strana 295)

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101

Freescale Interconnect Bus

Interfacing to MI Bus

MC68HC912D60A — Rev. 3.1 Technical Data

Freescale Semiconductor Freescale Interconnect Bus 295

Figure 16-4. A typical MI Bus interface

The transistor serves both to drive the MI Bus during the push field and

to protect the MCU TX pin from voltage transients generated in the

wiring. Without the transistor, EMI could damage the TX pin. Similarly,

the input pin (RX) is protected from EMI by clamping it to the MCU supply

rails with two diodes. When a load dump occurs, the zener diode (18V)

is switched on and hence turns the transistor on; this generates the logic

‘0’ state on the MI Bus. After eight time slots (200ms) of continuous ‘0’

state, all devices on the MI Bus will have their outputs disabled.

The MI Bus line can take two states, recessive or dominant. The

dominant state (‘0’) is represented by a maximum 0.3V (V

CESAT

of the

transistor, T1). The recessive state (‘1’) is represented by 5V, through a

pull-up resistor of 10kΩ.

The bus load depends on the number of devices on the bus. Each device

has a pull-up resistor of 10kΩ. An external termination resistor is used

to stabilize the load resistance of the bus at 600Ω.

1.2kΩ

+12V

18V

4.7kΩ

3.9kΩ

10kΩ

MI Bus

MCU

10kΩ

22kΩ

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